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RISC-V
The Open-Standard Instruction Set Architecture
- 5.1k followers
- Zurich, CH
- https://riscv.org
- @risc_v
- info@riscv.org
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- riscv-docs-base-container-image Public
A base container image populated with the dependencies to build the RISC-V Documentation.
- riscv-cfi Public
This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. and Unpriv. specifications at https://github.com/riscv/riscv-isa-manual
- riscv-cheri Public
This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
- sig-functional-safety-whitepaper Public
GitHub repository for the Functional Safety SIG Whitepaper Development
- riscv-spmp Public
The repo contains the SPMP architectural specification, which includes capabilities like access control of read/write/execute requests by an hart, address matching, encoding of permissions, exceptions for access violation, and support for virtualization.
- riscv-attached-matrix-extension Public Forked from riscv/riscv-isa-manual
AME repo without the UDB dependency!
- integrated-matrix-extension Public Forked from riscv/riscv-isa-manual
RISC-V Integrated Matrix Development Repository
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