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v0.0.0-10498-gb4323b94c

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[codegen 1.5] Add support for (optionally) merging redundant output p…

…orts

When the new `share_output_ports` codegen option is enabled, we will attempt to match up redundant output ports, replace them with a single authoritative port, and update the associated channel metadata.

PiperOrigin-RevId: 965238346

v0.0.0-10492-g28c43a51f

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Fix IR conversion of impl-style procs with channel subarray usage.

Since various erroneous ways of handling subarrays would end up breaking cross-module channel forwarding (seen in drafts of this change), this also adds a test for cross-module forwarding.

PiperOrigin-RevId: 964879807

v0.0.0-10482-g878d83443

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Make apfloat sub default `USE_LZA=false`.

PiperOrigin-RevId: 964351462

v0.0.0-10470-g53958d80e

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[xls] Skip iverilog simulator under HWADDRESS_SANITIZER in run_crasher

Check for HWADDRESS_SANITIZER in XLS as for ADDRESS_SANITIZER.

PiperOrigin-RevId: 963700203

v0.0.0-10464-g397e5c562

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Merge pull request #4634 from achowd32:main

PiperOrigin-RevId: 963038211

v0.0.0-10455-g9375c2b0d

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Fix Verilog codegen for narrow array update indices

When codegen for Op::kArrayUpdate, target indexes were compared directly
against the 32-bit loop counter (index_expr == induction_var).

When index_expr was narrower than 32 bits, Verilog's context-determined
width rules expanded index_expr to 32 bits before applying the operation
creating the index. For example, if the index_expr is ~1. The 1 is expanded
to 32 bits first and then do ~ evaluated as 32'hFFFFFFFF (4294967295)
instead of 1'b1 zero-extended to 32'd1, causing the index comparison to
fail for all elements and reducing the array update to a no-op in generated
Verilog.

This change explicitly zero-extends narrow index expressions to 32 bits via
concatenation ({ (32 - width)'b0, index_expr }), creating a self-determined
context so unary operations evaluate at their native width before
comparison.

PiperOrigin-RevId: 962249938

v0.0.0-10454-g27c62f9c2

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Integrate LLVM at llvm/llvm-project@a6b0af7536ef

Updates LLVM usage to match
[a6b0af7536ef](llvm/llvm-project@a6b0af7536ef)

PiperOrigin-RevId: 961806049

v0.0.0-10452-gccd2a0636

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Add proc_constancy_checker_main.

The idea of this tool is to use Z3 to search for provably-constant nodes that aren't represented as literals. Ideally, opt would be able to see all of these, although this is of course difficult in general.

PiperOrigin-RevId: 961202686

v0.0.0-10437-gfefe9ae49

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Check if committing a folding action would create a cycle.

Folding it could either create a visibility expression cycle, or a data cycle.

PiperOrigin-RevId: 960665768

v0.0.0-10427-g9c1470671

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API checking if performing a folding action would create a cyclical v…

…isibility expression.

The actual cycle analysis is in a following patch, this is the visibility-related primitive.

PiperOrigin-RevId: 960028412